Selecting eGaN® FET Optimal On-Resistance
Previously published articles showed that eGaN FETs behave for the most part just like silicon devices and can be evaluated using similar performance metrics.
In this white paper the die size optimization process for selecting the eGaN FET optimal on-resistance is discussed and an example application is used to show specific results. Since ‘optimum' means different things to different people, this process is aimed at maximizing switching device efficiency at a given load condition.
Download to find out more.
Read More
By submitting this form you agree to Efficient Power Conversion Corporation (EPC) contacting you with marketing-related emails or by telephone. You may unsubscribe at any time. Efficient Power Conversion Corporation (EPC) web sites and communications are subject to their Privacy Notice.
By requesting this resource you agree to our terms of use. All data is protected by our Privacy Notice. If you have any further questions please email dataprotection@techpublishhub.com
Related Categories: Components, Power
More resources from Efficient Power Conversion Corporation (EPC)
eGaN® FETs for Envelope Tracking
Gallium nitride transistors can be used to improve the efficiency of DC-DC conversion.
In this white paper we look at a new application that ...
eGaN® FET Drivers and Layout Considerations
When considering gate drive requirements, the three most important parameters for eGaN FETs are (1) the maximum allowable gate voltage, (2) the gat...
Benchmark DC-DC Conversion Efficiency with eGaN FET-Based Buck Converters
For applications requiring high power density and high power, but not requiring electrical isolation, the buck converter has been the workhorse top...